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Microchip Lanch New dsPIC33C Family dsPIC33CH512MP508


Build Larger, More Robust Applications with Microchip’s Expanded Dual- and Single-core dsPIC Digital Signal Controller (DSC) Family


New dsPIC33C devices meet market demand for more memory and functional safety
features in automotive and wireless charging applications

The dsPIC33CH512MP508 (MP5) family expands the recently introduced dsPIC33CH with Flash memory growing from 128 KB to 512 KB and triples the program RAM from 24 KB to 72 KB. This enables support for larger applications with multiple software stacks or larger program memory, such as automotive and wireless charging applications. More memory is needed to accommodate AUTOSAR software, MCAL drivers and CAN FD peripherals in automotive applications. Implementing wireless charging in automotive applications requires additional software stacks for the Qi protocol and Near-Field Communication (NFC), driving the need for even more program memory. Using Live Update capability for real-time firmware updates is essential for high-availability systems but also doubles the overall memory requirement. In the dual-core devices, one core can function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions. For example, having two cores facilitates partitioning of the software stacks for parallel execution of the Qi protocol and other functions such as NFC to optimize performance in automotive wireless charging applications.

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